Based on the numbers alone, this appears to be the ideal time to be a semiconductor company. With chip demand soaring, annual revenue increased by 9 percent in and by 23 percent in —far above the 5 percent reported in . Even before the pandemic, capital markets were rewarding the industry’s surging profitability, with semiconductor companies delivering an annual average of 25 percent in total shareholder returns (TSR) from the end of to the end of . Last year, shareholders saw even higher returns, averaging 50 percent per annum as remote work became the norm and consumers and businesses upped their technology purchases, helping to accelerate the digital revolution.
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Behind the scenes, however, today’s semiconductor companies are facing a host of challenges. Even with fabs operating at full capacity, they have not been able to meet demand, resulting in product lead times of six months or longer. The ongoing semiconductor shortage now routinely makes headlines, especially when it forces automotive OEMs to delay vehicle production. What’s more, semiconductor companies are grappling with increased design complexity, a talent shortage, and pandemic-related issues that are disrupting the complex, global supply chain that links players in different markets. The shortage is now so concerning that it is prompting more large technology companies and major automotive OEMs to move chip design in-house—a trend that could have major implications for the market.
In other industries, manufacturers often respond to shortages by increasing output. But fab construction and production ramp-up for semiconductors are extremely costly and time consuming—often requiring a year for significant expansion or more than three years to build a new facility—which makes it difficult to increase semiconductor volumes quickly. While increasing capacity may sometimes help, it will not produce immediate results and typically requires a significant investment for many years before additional revenues—if any—will appear.
To help semiconductor companies develop a comprehensive plan for success, we quantified the benefits of capacity expansion to determine when construction may be justified. We also identified other strategies that can help semiconductor companies improve productivity and revenues, such as increasing the focus on leading-edge chips, pursuing innovations that go beyond node size, making bold long-term investments, developing greater resilience, improving the talent pipeline, and collaborating within the semiconductor ecosystem.
Although headlines about the semiconductor shortage often discuss the situation in broad terms, the industry includes many different segments: memory, logic, analog, discrete, optical components, and sensors. Individual semiconductor companies and their manufacturing sites tend to focus on select segments. Their end customers, by contrast, typically require products from all semiconductor segments and thus rely on multiple suppliers. The absence of a single specialized chip can bring the manufacture of end products to a halt, even if all other components are available.
The production process is also more complex and multilayered than headline writers often choose to acknowledge. When all production phases are considered, the entire process extends from material procurement to back-end manufacturing (Exhibit 1). (Some may choose to take a narrower view, in which the value chain begins at the design phase.) For each product segment, most companies specialize in three or fewer steps and may outsource some activities, such as printed-circuit-board assembly, to partners. After back-end manufacturing, semiconductors become part of the electronics value chain.
The industry has become increasingly consolidated within many of these value chain segments over the past 20 years, and a few champions have emerged in each area (Exhibit 2). As a result, expertise is often concentrated in certain markets (for instance, the United States has the highest presence of fabless players—that is, chip design only—and equipment manufacture). No local market has all the capabilities required for end-to-end semiconductor design and manufacturing, and the concentration of expertise has created a web of interdependencies along the value chain (Exhibit 3).
The concentration of expertise conveys some advantages because it often allows companies to share resources, such as power supply, even if they are rivals, which helps keep costs down. Employees with the right skills may also gravitate to expertise clusters, creating a strong talent pool. But the interdependencies also mean that local shocks can have a global effect, such as when a flood in Thailand in stopped production in multiple memory backend fabs in the country and pushed prices of memory chips 30 percent higher.
Semiconductor fabs were already operating at close to full capacity before the pandemic because they try to avoid investing in new capital equipment beyond that required to meet demand from customers. Uncertain trade dynamics also motivated several players to increase their semiconductor stock levels to secure supply. The pandemic, which spurred purchases of computers and other devices for remote work, then took demand to even greater heights.
For automotive OEMs and other companies, one response has been to deviate from their typical “just in time” ordering. Instead, they have started to order more chips than necessary so that they can build their inventory and have reserves on hand. In the short term, however, this move has magnified the gap between supply and demand. Over the longer term, some companies may consider requesting binding “take or pay” contracts in which they can either accept a certain quantity of chips or pay a fee if they decline to do so. This arrangement helps companies align chip demand with manufacturing capacity more accurately.
Customers may also consider coinvesting with semiconductor companies in projects designed to increase fab capacity. Such projects can allow semiconductor companies to reduce their up-front investment, relieving potential capital expenditure constraints. But coinvesting will not immediately improve the semiconductor shortage, given the long timelines for fab construction and production ramp-up.
Despite the current uncertainty, the semiconductor industry is poised for additional growth, as more and more products and services become increasingly digitized. More than half of the semiconductor industry’s current enterprise value is based on earnings-growth expectations, as is reflected in current valuations: investors expect long-term growth of 7 to 8 percent per annum, assuming the recent margin trajectory.
But what strategies can help the industry meet these targets? While the answer may vary based on a company’s strengths and weaknesses, all semiconductor companies could benefit by rethinking their approach in six critical areas: technology leadership, long-term R&D, resilience, talent, ecosystem capabilities, and greater capacity. The final area here will not provide immediate benefits, of course, but it could be an important part of a long-term strategy. We have quantified the costs associated with fabs of different sizes to help semiconductor companies determine if capacity expansion is right for them.
Based on a recent analysis of integrated device manufacturers (IDMs) and fabless players, we believe that strong growth is possible for all semiconductor companies, regardless of size (Exhibit 4). Although the largest companies generated the greatest economic profit, there are also small, niche players with high operating margins.
Across all product segments, semiconductor companies strive for innovation because faster, more powerful chips and leading-edge equipment help generate greater sales in all value chain segments. The companies with the most distinctive technologies and products are likely to become the global champions. In a cross-industry analysis, the semiconductor sector was second only to pharmaceuticals and biotechnology for R&D spending—calculated as a percent of sales (Exhibit 5). When we examined industry champions, we found that they often succeeded by incorporating the following strategies into their R&D plans.
A focus on leading-edge chips and the machinery required to create them. For semiconductor manufacturers, creating smaller node sizes has traditionally been the path to success. For decades, the number of transistors on a chip doubled every two years—the rate predicted by Moore’s law—as semiconductor companies constantly decreased the size of technology nodes. In recent years, however, the rate of doubling has slowed because technological challenges increase as the industry approaches the physical limits for the number of transistors that can be included on a single chip. Nevertheless, companies will still attempt to push the technology, because average demand growth for chips with the smallest nodes—seven nanometers (nm) and below—will be four percentage points higher than supply growth through .
The importance of node size varies by device segment, and the demand for leading-edge chips will grow much more in some categories than in others. Since customers expect high performance for compute-intensive applications, semiconductor companies that design chips in the smallest available technology node may have a distinct advantage in these areas. In other segments, larger nodes are often suitable because customers are satisfied with current chip performance or require specific features, such as fast switching, and see little advantage in moving to smaller node sizes.
Equipment manufacturers may capture growth by creating the machinery required to enable leading-edge innovations. In addition, they could create equipment that includes advanced technologies to optimize process control, as well as yield monitoring and enhancement.
Demand for specific mature nodes (40 to 65 nm) is also higher than average, since they are used in automobiles and other critical products. Their profit margins historically tend to be lower, however, making it sometimes difficult to support a business case for expanding mature-node capacity. If new fabs are built, the high up-front costs will mean that companies will initially see lower profits from them than they will from existing fabs with depreciated assets. To ensure solid returns over the long term, players could work to get hard commitments from their customers to guarantee that new fabs will have high utilization once on line.
Differentiation through ‘more than Moore.’ Beyond reducing structure size, some semiconductor companies are pursuing “more than Moore” innovations to make their products distinctive. Some, for instance, are developing semiconductors based on materials other than silicon. Compound semiconductor materials, such as silicon carbide (SiC) and gallium nitride (GaN), are particularly well suited for applications requiring both high power and frequency, since they limit energy loss and allow for the creation of smaller form factors.
The push for increased sustainability and electrification is spurring the adoption of SiC and GaN power devices, and the compound annual growth rate (CAGR) for both categories is expected to far exceed the 5 percent growth forecasted for the power semiconductor market as a whole (Exhibit 6). In the base-case scenario, annual market growth is expected to be 23 percent for SiC devices and 40 percent for GaN power devices.
Equipment manufacturers could promote innovation and capture new opportunities by launching machinery specialized for processing SiC or GaN. Given that demands for these machines will be lower than that for mainstream leading-edge equipment, manufacturers should carefully review the business case for developing these initially niche products. Foundries could provide access to SiC- and GaN-based innovation to a broader base of fabless semiconductor players.
A focus on innovative features may be particularly valuable in high-growth segments, such as the Internet of Things, because it helps differentiate products from competitors (for instance, by optimizing the fast switching required in several radio frequency applications). Several IDMs and foundries are already developing such products in mature nodes.
Advanced packaging of semiconductor components. These techniques provide better heat management during operations, allowing companies to place semiconductor components closer together. With a greater number of connection points, these chips provide higher data-transfer rates and better performance. In addition, advanced packaging allows semiconductor companies to combine mature and leading-edge chips in an integrated system for applications that need both types, which lowers costs. This trend, called heterogeneous integration, enables companies to combine multiple smaller chips instead of making one large chip. Larger chips often have lower yield, with the drop typically scaling with chip size, so heterogeneous integration may deliver profound cost benefits.
The advanced-packaging market was valued at $20 billion in , and this figure is expected to rise to $45 billion by , when it will represent about 50 percent of packaging revenues. Although leading-edge IDMs and foundries are driving packaging innovations, advanced techniques also create opportunities for other players across the value chain because they boost demand for new materials and new equipment.
Specialized applications. Application-specific integrated chips (ASIC) integrate well-defined algorithms and functions into their chip design and are customized for specific purposes, such as for use in artificial intelligence and cloud computing. The segment has recently grown significantly and could offer a good opportunity for additional players. Small companies that want to focus on developing specialized semiconductors could still find their products in high demand, even if their customer base is relatively small.
The customer base for ASICs includes many different companies, such as automotive OEMs and hyperscalers, and their needs will vary. Some customers may decide to design their own ASICs in-house to improve customization, differentiate their products, and reduce lead times. They would then work directly with foundries for their manufacturing needs. Other players, typically smaller ones, prefer to have an ASIC partner that is responsible for all steps needed to move from design to end product because this requires many specialized competencies.
R&D cycles within the semiconductor industry can be very long, sometimes extending beyond ten years, and companies typically do not see immediate returns. Historically, some governments have helped fund such work, since most publicly listed companies do not always have the appetite for such long-term investments.
Although many investors may be skeptical of providing funding over an extended period, semiconductor companies have proven that bold, long-term investments can eventually deliver substantial returns. For instance, ASML spent 17 years and about $7 billion developing its extreme-ultraviolet lithography technology, including the ability to produce the technology at volume. The long R&D timeline was worthwhile, since the tool is now a major source of revenue for ASML. Similarly, Arm spent six years developing a 64-bit computing processor that is now a significant source of the company’s revenue.
Other companies that invest heavily in long-term R&D projects could help promote technological leaps—often far more than node reduction—that could help improve society. The creation of specialized chips for quantum computing, for example, could improve pharmaceutical development, sustainability programs, and other initiatives across industries. In most cases, semiconductor companies are focusing on increasing investment in areas where they are already strong, rather than branching into new areas to extend their technological advantage even further.
Like other businesses, semiconductor companies and other industry stakeholders are still attempting to develop new strategies to manage the huge disruptions arising from the COVID-19 crisis, including supply chain problems and shifting demand. One thing is clear: the postpandemic world will likely remain more volatile, which will require greater resilience from companies.
In markets with a large mismatch between local supply and demand, semiconductor companies could consider dedicating more capacity for the nodes that are most urgently needed to provide some short-term relief. For instance, European end customers largely require semiconductors with nodes larger than 28 nm for automotive and industrial applications, while customers in the United States have a much higher need for semiconductors with nodes smaller than seven nm. Additional capacity might best be tailored to meet such needs. In addition to helping the local market, these moves would increase supply chain resilience and lessen intermarket dependencies.
Semiconductor companies could also help decrease lead times by becoming more agile and responsive, such as by expanding their supplier base, strengthening pricing strategies, improving chip allocation to customers, working with industry organizations to explore solutions to the chip shortage, and inviting customers to coinvest in the development of custom chips.
The current economic situation calls for increased agility. While demand for semiconductors is strong now, a downturn in major markets—always a possibility—could necessitate new strategies to minimize capital expenditures and maximize revenues. For instance, semiconductor companies might consider revising their down-payment policies and charge customers up front for dedicated capacity, or they might require customers to provide binding demand forecasts more than 18 months in advance.
As semiconductors become more critical to product differentiation, some electronics companies, automotive OEMs, and hyperscalers are moving chip design in-house to increase customization and eliminate bottlenecks. These moves are making competition for already-scarce semiconductor talent even tougher than usual. Simultaneously, chip design is becoming more and more complex as the functions of semiconductors expand, which requires more labor. The increase in labor is especially high with five-nm nodes, which are the most difficult to design and require the most days of labor (Exhibit 7).
With greater competition, semiconductor companies would be wise to increase their efforts to recruit talent, including staff with expertise in process technology and operations management. But first, they must address an image problem. In a recent survey of employees, the semiconductor industry ranked lower than tech and automotive on multiple dimensions of workplace attractiveness, including work–life balance, career opportunities, and diversity and inclusion (Exhibit 8). Companies may want to review their own operations to ensure that they are competitive in these areas.
As semiconductor companies step up recruitment, they may need to build their brand. Typically, semiconductor products receive less attention than end products, and prospective employees may have little knowledge of the many strong and innovative companies within the sector. Companies might also need to review compensation and learning and development opportunities to ensure that they are on par with businesses in other industries.
One possible solution to the labor shortage might involve forming partnerships with academic institutions, especially in markets where talent is in very short supply. If semiconductor companies consider supporting learning programs, and perhaps provide guidance on classes offered, graduates are more likely to have the skills required to work in the industry.
The increased complexity of chip design, combined with shifts in the value chain and greater competition for talent, have increased the importance of ecosystem building within the semiconductor industry. Partnerships with customers are already becoming more common. For instance, many automotive OEMs that want to improve their design capabilities are now collaborating with semiconductor companies, especially on the development of application-specific solutions, such as those for autonomous vehicles.
In another type of collaboration, companies may create ecosystems in which one player develops intellectual-property (IP) blocks that many customers can leverage. Arm, for instance, has developed an architecture for a processor that others may license. This strategy decreases costs for all involved. Some companies have also formed strong IP partnerships with academic institutions.
Major semiconductor players also have a long history of joining forces to develop and align their technology blocks, thereby reducing the chance that one organization will create a technology that does not fit into the value chain. Similarly, industry associations can play an important role in providing guidance on the long-term technology road maps, and dedicated semiconductor research institutes, such as Imec, in Belgium, may convene players to collaborate during precompetitive research.
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Beyond partnerships, semiconductor companies might want to undertake a programmatic M&A strategy—a serial approach to smaller acquisitions, along a specific theme—as the industry consolidates. If they do so, they might benefit by focusing on acquisitions that would allow them to branch into adjacent areas, open important markets, or add capabilities essential for future growth and for extending their technology leadership. The current scarcity of targets, however, requires potential acquirers to investigate and execute mergers quickly.
Collaboration with other ecosystem members could also take more informal shapes. If multiple semiconductor companies agree to build or expand hubs for design and manufacture, they could have an easier time attracting talent and might obtain other benefits, such as the ability to collaborate on IP development.
For some semiconductor companies, capacity expansion could deliver benefits. But given the enormous sums required for construction and equipment, company leaders must carefully consider plant capacity before moving ahead. Operating and construction costs, when indexed per 12-inch mask layer, fall as capacity increases. For instance, indexed construction and operating costs are both around $3 billion for fabs with a capacity of 250,000 layer starts per week (LSPW). Indexed construction costs drop to between $2 billion and $3 billion for fabs with a capacity of 400,000 LSPW, after which they plateau. Operating costs reach a plateau for fabs with a capacity of around 575,000 LSPW.
Our analysis suggests that fabs with a capacity of at least 600,000 LSPW generate the best cost position (Exhibit 9). This would correspond to 12,000 to 20,000 wafer starts per week, depending on the product. The type of chip being produced will significantly affect costs, which increase exponentially as node size shrinks. Building a 40-nm fabrication plant with a capacity of at least 600,000 LSPW would likely require around $5 billion, with about 80 percent of the investment going to equipment expenses. But leading-edge fabs producing the smallest node sizes might cost $10 billion or more.
Semiconductor companies might be able to obtain some cost advantages by building fabs in areas where there is already a cluster of similar businesses, since this may help ensure sufficient talent availability and resources (such as land, energy, and water). In another cost-saving move, players could attempt to improve tool hookup and ramp-up to earn back the cost of their investment more quickly. Their efforts might involve forming partnerships with equipment manufacturers to apply advanced analytics that increase yield. For example, modeling made possible by advanced combinatorial learning could potentially replace some elements of physical testing throughout the full manufacturing cycle, decreasing both costs and time to market. For instance, companies could switch from physical metrology to virtual metrology using data.
Some government officials in markets where chip demand outstrips local supply are also thinking about strategies to increase local front-end manufacturing capabilities, particularly since greater supply chain disruptions and geopolitical issues have recently complicated trade. In some cases, they may subsidize fab construction, which research suggests can help companies recoup their investment more quickly. But many government officials may not be aware of all the challenges they will face in trying to catch up to leading markets. (For more information on these topics, see sidebar, “Should local markets increase foundry capacity and other semiconductor capabilities?”)
Since the semiconductor value chain is so complex and specialized, the industry will likely remain a highly interdependent global network for the foreseeable future. And as no market has companies with all the capabilities needed along the entire end-to-end value chain, each one should focus on strengthening its position in areas where it now leads. This strategy will help markets stay relevant as the latest era of semiconductors
In terms of end markets, after being flat at around 262 million units over and in , PC sales are expected to grow in by over 4% to about 273 million units.11 Meanwhile, smartphone sales are expected to grow at low single digits in (and beyond) to reach an estimated 1.24 billion units in (6.2% year-over-year growth).12 These two end markets are important for the semi industry: In , communication and computer chip sales (which include data center chips) made up 57% of overall semiconductor sales for the year compared to auto and industrial (which accounted for only 31% of sales combined, for example).13
One challenge for the industry is that while gen AI chips and associated revenues (memory, advanced packaging, communications, and more) are responsible for outsized revenues and profits, they represent a small number of very high-value chips, meaning that wafer capacity—and therefore utilization—for the industry as a whole isn’t as high as it might appear. In , nearly a trillion chips were sold at an average selling price of US$0.61 per chip.14 At a rough estimate, although gen AI chips might account for 20% of revenues in , they were less than 0.2% of total wafers.15 Even though global chip revenues for were forecast to rise 19%, silicon-wafer shipments for the year actually declined an estimated 2.4% for the year.16 That number is expected to grow by almost 10% in , fueled by demand for components and technologies used largely in gen AI chips, such as chiplets, as mentioned in our TMT Predictions report.17 Of course, silicon wafers are not the only kind of capacity to track: Advanced packaging is growing even faster. As an example, some analysts estimate that TSMC’s CoWoS (chip-on-wafer-on-substrate) 2.5D advanced packaging production capacity will reach 35,000 wafers per month (wpm) in and could increase to 70,000 wpm (100% year-over-year) and further by 30% year-over-year to 90,000 wpm by end of .18
Further, driving innovation in the industry is not cheap. In , the overall chip industry average for spending on research and development was 45% of its earnings before interest and taxes (EBIT), but by , it was an estimated 52% of the same.19 R&D seems to be growing at a 12% CAGR, white EBIT is only growing at 10% (figure 2).20
Many of the chips that are being used for training and inference of gen AI cost tens of thousands of dollars and are destined for large cloud data centers. In and , these chips or lightweight versions of these chips are also finding homes in the enterprise edge, in computers, in smartphones, and (over time) in other edge devices such as IoT applications. To be clear, in many cases, these chips are being used for either gen AI, traditional AI (machine learning) or, increasingly, a combination of both.
The enterprise edge market was already a factor in , but the question in will be about smaller, cheaper, less powerful versions of these chips becoming a key part of computers and smartphones. What they lack in per-chip value, they can make up for in volume: PC sales are expected to be over 260 million units in , while smartphones are expected to be over 1.24 billion units.22 Sometimes, the “gen AI chip” can be a stand-alone single piece of silicon, but more commonly it’s a few square millimeters of dedicated AI processing real estate that is tiny part of a much larger chip.
Enterprise edge: Although gen AI via the cloud will likely continue to be a dominant option for many enterprises, about half of the enterprises worldwide are predicted to add AI data-center infrastructure on-premises—an example of enterprise edge computing.23 This could be, in part, to help protect their intellectual property and sensitive data and comply with data sovereignty or other regulations, but also to help them save money.24 These chips are largely the same as those found in hyperscale data centers, with server racks costing millions of dollars and requiring hundreds of kilowatts of power. Although smaller than hyperscale chip demand, we estimate the chips for enterprise edge servers will likely be worth tens of billions of dollars globally in .25
Personal computers: Sales of gen AI–powered PCs are predicted to comprise half of all PCs in ,26 with some forecasts suggesting that almost all PCs will have at least some onboard gen AI processing—also known as neural processing units (NPUs)—by (figure 4).27 These NPU-powered machines are expected to command a price premium of 10% to 15%,28 but it’s important to note that not all gen AI PCs are equal. There’s a dividing line at the 40 TOPS (trillion operations per second) level, following a recommendation from major PC ecosystem companies that only computers with more than 40 TOPS be considered true AI-enabled PCs.29 As at the time of writing, some buyers are cautious about these new PCs, either unwilling to pay the premium, or waiting until more powerful gen AI NPUs are introduced in the second half of .30
As of December , many of the installed base of PCs were running on x86 CPUs, with the balance being on CPUs based on the Arm architecture. MediaTek, Microsoft, and Qualcomm announced in that they would make Arm-powered PCs, specifically gen AI PCs.31 It’s unclear how successful these machines will be in the next 12 months, but it will likely be a key issue for the various chipmakers, with Qualcomm predicting it will sell US$4 billion worth of PC chips annually by .32
Smartphones: Where PC NPUs might be worth tens of dollars in value, smartphone-equivalent gen AI chips may be worth much less, and we estimate the silicon on next-generation smartphone processors to be under US$1.33 Even though the smartphone market is over a billion units sold annually, and even though we predict gen AI smartphones will be 30% of phones sold in ,34 the semiconductor impact is likely smaller than PCs in dollar terms. Instead, an interesting angle for chipmakers could be to see if consumers are excited enough about new gen AI phones and features to shorten the replacement cycle. Consumers have been keeping phones longer before upgrading, and sales have been flat for years now.35 If gen AI enthusiasm causes an uptick in smartphone sales, it could benefit all kinds of chip companies, not just those that make the gen AI chips themselves.
IoT: A gen AI chip in a data center might cost US$30,000. A gen AI chip on a PC might cost US$30. A gen AI chip on a smartphone might be US$3. For gen AI chips to work on the low-cost IoT market, they should cost about US$0.3. That’s unlikely to happen anytime soon, but with the possibility of tens of billions of IoT endpoints needing AI processors, this is a market to watch for the longer term.
Deloitte predicted that, by , AI would emerge as a powerful aid to human semiconductor engineers, assisting them on extremely complex chip-design processes, and enabling them to find ways to improve and optimize PPA (power, performance, and area).36 As of , gen AI has enabled rapid iterations to enhance existing designs and discover entirely new ones that can do it in less time.37 In , there will likely be more emphasis toward “shift left”—an approach to chip design and development where testing, verification, and validation are moved up earlier in the chip design and development process38—as optimization strategies could evolve from simple PPA metrics to system-level metrics like performance per watt, FLOPs (or “floating point operations per second”) per watt, and thermal factors.39 And the combination of advanced AI capabilities—graph neural networks and reinforcement learning—will likely continue to help design chips that are more power-efficient than typical chips produced by human engineers.40
Domain-specific and specialized chips are expected to continue to gain prominence over general-purpose ones, as several industries (such as automotive) and certain AI workloads would require customized approaches to designing chips.41 However, a widespread adoption of application-specific integrated circuits42 remains less clear, as the development and maintenance of such hardware can be costly and could divert focus from other AI advancements.43 But here’s where gen AI tools can allow companies to design more specialized and competitive products including custom silicon.44
3D ICs and heterogeneous architectures are introducing challenges related to arranging, assembling, validating, and testing the various chiplets, which can sometimes be preassembled.45 This shift toward system design over individual product design can incorporate software and digital twins early on—stressing the importance of early and frequent testing.46 By , synchronizing hardware, system, and software development upstream in the process will likely help redefine future systems engineering and enhance overall efficiency, quality, and time to market.
To evolve and keep pace with the changing face of design, the industry may want to consider new ways to handle complex design processes. Already, the chip industry is exploring digital twins to emulate and visualize complex design processes step by step, including the ability to move around or swap chiplets to measure and assess performance of a multi-chiplet system.47 And digital twins could increasingly be used to give a visual representation (via 3D modeling) of the physical end-device or the system to assist with all aspects of design, including mechanical as well as electrical (software and hardware). Designers should work with electronic design automation (EDA) and other hi-tech computer-aided design/computer-aided engineering companies to strengthen design, simulation, and verification and validation tools and capabilities for hybrid and complex heterogenous systems.48 And they also should consider using and adapting model-based system engineering tools as part of the broader EDA “shift-left” approach.49
As design and software are expected to play crucial roles in the development of next-generation advanced chip products, bolstering cyber defense becomes more important, heading into .50 To help align with the shift-left approach, chip designers should integrate security and safety testing early in the chip-design process. They should implement redundancy and error-correction and -detection mechanisms to help ensure that systems can continue to operate even when some of the components fail, and hardware-based security features such as secure boot mechanisms and encryption engines.51
In Deloitte’s semiconductor industry outlook, we estimated that the industry needs to add a million skilled workers by , or more than 100,000 every year.52 Two years after, not only does that forecast hold good, but the talent challenge is expected to intensify further in . Globally, countries are not producing enough skilled talent to meet their workforce needs.53
From core engineering to chip design and manufacturing, operations, and maintenance, AI may help alleviate some engineering talent shortages, but the skill gap looms (figure 5).54 Attracting and retaining talent will likely continue to be a challenge for many organizations in , and a big part of the problem is an aging workforce, which is more prominent in the United States and even Europe.55 Add the complex geopolitical landscape and supply chain fragility to this equation, and it becomes clear that the availability of talent supply is under stress globally.56
With onshoring and reshoring of fabrication, assembly, and test in the United States and Europe, there will likely be pressure on chip companies and foundries as they source more of the talent locally in . For example, talent challenges are contributing to delays in opening new plants.57 On a related note, “friendshoring” (collaborating with companies from countries considered to be allies) can provide stability and resilience to supply chains, especially for the United States and European Union. But it also demands scouting for the right skills to help meet new capacity demands and talent roles in destinations such as Malaysia, India, Japan, and Poland.58
Chip companies can’t continue to wrestle over the same finite talent pool and still expect to match up to the industry’s pace of technological advancement and capacity expansion. So, what can semiconductor companies do in to address the talent conundrum?
To help attract AI and chip talent, chip companies should consider offering a sense of trust, stability, and projected market growth. With this, they can help make the industry more appealing to recent high school grads and fresh entrants to help reinvigorate talent pipelines.59
Countries aiming to benefit from their respective domestic chips acts should consider weaving in strategic goals and aspects related to workforce development and activation. Some examples could include training programs, expanded vocational and professional education, and employment opportunities that their local chip companies would commit to in order to receive funding. Semi companies should consider collaborating with educational institutions (high schools, technical colleges, and universities) and local government organizations to leverage chip funds to develop and curate targeted workforce training and development programs aligned with specific industry needs in the region.
Semi companies should design flexible upskilling and reskilling programs for career path flexibility to help address future workforce skills and gaps. Additionally, they should implement and leverage advanced tech and AI-based tools to assess diverse talent related factors such as supply, demand, and current and projected spend, to perform complex workforce scenario modeling to support strategic talent decision-making.60
Deloitte’s semiconductor outlook already talked about geopolitical tensions in depth, so what’s new for ?
The same … but even more. As one example, in December of , the outgoing administration issued a new list of US export restrictions mainly still focused on advanced nodes (despite some speculation that restrictions might be broadened to include some relatively less advanced nodes). These restrictions now include separate additional categories around advanced inspection and metrology.62 Additionally, many (over 100) new entities (mainly Chinese) have been added to the restricted entity list.63
As part of these restrictions, the United States seems to be adopting the “small yard, high fence” approach toward semiconductor export restrictions.64 This aims to impose a high level of restrictions on a relatively small subset of chip technologies, with a focus on those that defense, including advanced weapon systems, and advanced AI used in military applications.65
The new restrictions (if implemented by the new administration) go on to flag that AI advancements are increasingly being viewed as matters of national security. The day after those new restrictions, China announced further restrictions on the export of gallium and germanium (as well as other materials), both key for the manufacture of multiple semiconductors.66 As we predicted in , ongoing materials restrictions will likely pose a challenge for the chip industry, but also an imperative for the industry to do more recycling of e-waste.67
In mid-January , the outgoing administration announced the Interim Final Rule on AI Technology Diffusion. The Interim Final Rule will impose new controls for chip exports.68
At the time of writing, it is unknown whether the incoming administration will roll back the December and January restrictions, modify them, or even propose additional restrictions.
Additionally, the new administration has proposed increasing its use of tariffs, including tariffs on goods from China, Mexico, and Canada.69 Given the global nature of most semi supply chains, the proposed new AI-related chip-export controls (by the outgoing administration) and the planned higher tariffs would likely have an impact and could make supply chains more complex to administer, shifting profits, costs, and more. And the impact could be felt across the supply chain—including R&D and manufacturing—as well as affecting how industry policies are shaped across countries and regions.
Of course, there are additional geopolitical risks or changes: Conflicts in Ukraine/Russia and the Middle-East continue, potentially affecting semiconductor manufacturing, supply chains, and critical raw materials. But the chip industry has other vulnerable points: The December martial law order in South Korea highlighted the global supply chain’s dependency on and concentration of certain types of semiconductors, especially in the most advanced technologies.70 As an example of concentration, almost 75% of DRAM memory chips globally are made in South Korea.71
It’s not just geopolitics that can interrupt key materials: ’s Hurricane Helene briefly shut down two mines in North Carolina, which are sources for nearly all of the world’s ultra-high-purity quartz, essential for making crucibles which are a key part of the chipmaking process.72 With hurricanes, typhoons, and other extreme weather events projected to become more frequent and intense due to climate change, expanding sources for key materials is likely to remain a supply chain priority.73
It is worth noting that, as of late , a key part of the export restrictions from the United States and allies is having an effect: The restrictions around extreme ultraviolet lithography machines seem to be posing a barrier, preventing Chinese companies from making advanced-node chips at scale and with acceptable yields. Although there are 7 nanometer and 6 nanometer chips being made in limited numbers using older deep ultraviolet technology, the volumes are low, yields are uneconomical, and that situation is expected to persist at least until .74
To be clear, semiconductor supply chains worked well in , even as the industry grew by almost 20%. At this time, there’s no reason to believe supply chains will be less resilient, but as always, the risk is there. And given how important gen AI chips are expected to be in and beyond (up to 50% of sales, perhaps75) and the relatively higher concentration of processor, memory, and packaging required for cutting-edge chips, the industry may be more vulnerable to supply chain disruptions than ever before. Although the industry is likely to become less concentrated geographically thanks to various chips acts—and initiatives like onshoring, reshoring, nearshoring, and friendshoring are all still in their early days—the industry remains highly vulnerable for the next year or two, at least.
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